The present invention is related to a phase-arrayed transceiver, and more particularly to a low cost phase-arrayed transceiver.
Phase-arrayed transceivers are widely used in wireless communication systems. Phase-arrayed transceivers comprise a plurality of phase-arrayed channels, wherein a typical phase-arrayed channel comprises a transmitter and a receiver. Conventionally, the transmitter and the receiver of a phase-arrayed transceiver are completely separate from each other for ease of design and implementation, which means that the transmitter and the receiver in a phase-arrayed transceiver are coupled to different respective antennas and different phase shifters. The conventional architecture of the phase-arrayed transceivers therefore requires numerous phase shifters and large-area distribution networks, which consequently increases the manufacture cost. Accordingly, how to reduce the chip size of the phase-arrayed transceivers is an urgent problem in this field.